Very-large-scale Integrated Circuits Design

Very-large-scale Integrated Circuits Design

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1:30 (22.1) aquot;Design forTest Calculus: An Algorithm for DFr Rules Checking, aquot; D.K. Bhavsar. Genera! ... K. Torku, B.M. Huey, IBM Session 23-West Ballroom Circuit Extracting Chairman: D. Gibson. United ... G. DeMicheli, Univ. of Calif, at Berkeley (34.2) aquot;Bounds on the Saved Area Ration Due to PLA Folding.aquot; WT. Liu. ... (46.4) aquot;Experiments with the SLIM Circuit Compactor, aquot; R.C. McGarity, D.P. Siewiorek.

Title:Very-large-scale Integrated Circuits Design
Publisher: - 1983

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